Currently, an Error Checking and Correcting (ECC) technology used in a Random Access Memory (RAM) is mainly implemented by using a Hamming code, and the technology has functions of correcting an error of 1 bit and detecting errors of 2 bits. The ECC technology is implemented usually aiming at a certain width of data bit, and typical widths of data bit may be 32 bits, 64 bits, 128 bits or the like. Data bits of original data may be regarded as a matrix in which the data bits are arranged in rows and columns, odd-even check is performed on the rows and the columns to generate a check code, and the check code and the original data are written into and saved in the RAM. During data reading, the original data and the check code are read out together from the RAM, a new check code may be generated by means of the same algorithm, and furthermore, an erroneous row and column during data reading can be determined by comparing the two check codes to obtain a difference therebetween, thereby determining an erroneous data bit during data reading.
In the above method, it is necessary for a high-bit part and low-bit part of a data bit to participate in generation of each check code, when a data bit width changes, it is needed to change a polynomial generated from the matrix correspondingly, and therefore the method is lower in generality.